Path:OKDatasheet > Semiconductor Datasheet > TI Datasheet > SN74LVC112ADBR
SN74LVC112ADBR spec: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Path:OKDatasheet > Semiconductor Datasheet > TI Datasheet > SN74LVC112ADBR
SN74LVC112ADBR spec: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Valmistaja : TI
Pakkauspäivämäärä : DB
Pins : 16
Lämpötila : Min -40 °C | Max 85 °C
Koko : 140 KB
Hakemus : DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET